This repository contains all the designs done by Shreyas Singh in the VLSI related Labs-Digital VLSI design(5th semester) and Current Mode Analog VLSI desig(6th sem)
current vlsi cadence-virtuoso vlsi-physical-design propagation-delay analog-ic-design ltspice ptl nand-memory icdesign digital-ic-design current-mode-circuits nor-memory current-conveyor operational-mode-amplifier current-feedback-amplifier translinear-circuits negative-impedence-converter
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Updated
May 9, 2026