Code for "Layered Neural Rendering for Retiming People in Video."
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Jan 7, 2021 - Python
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retiming
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Register manipulation algorithms which are in use today are heuristic based and they don’t provide the global optimum always. Here we aim to develop a machine learning algorithm that can solve the problem with greater speed and accuracy than the existing algorithms.
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Mar 26, 2019 - Python
An implementation and study of Retiming paper [1] in the AAPP class of Polimi.
python graph-algorithms jupyter-notebook python-script performance-metrics course-work performance-analysis paper-implementations colab-notebook retiming python-graph-tool
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Oct 5, 2020 - Jupyter Notebook
Full VLSI design flow for a 1st-order IIR low-pass filter. It includes VHDL RTL, fixed-point C model, Synopsys DC synthesis with clock gating, and Cadence Innovus place & route. The advanced architecture of the filter applies J-look-ahead, pipelining, and retiming to achieve 581 MHz, a 47% throughput gain over the standard architecture.
matlab vhdl verilog digital-signal-processing pipelining vlsi questasim logic-synthesis digital-filter iir-filter retiming asic-design place-and-route rtl-design synopsys-dc hardware-design fixed-point-arithmetic cadence-innovus clock-gating nangate45
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May 4, 2026 - VHDL
The former best speedrun retime tool.
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Dec 12, 2024 - Python
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