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Add PPE42 (PowerPC Embedded) architecture support#338

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Manideep-Bhupalam:base_ppe
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Add PPE42 (PowerPC Embedded) architecture support#338
Manideep-Bhupalam wants to merge 1 commit into
intel:mainfrom
Manideep-Bhupalam:base_ppe

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feat: Add PPE42 (PowerPC Embedded) architecture support

Add support for the PPE42 (PowerPC Processor Embedded 42-bit) architecture used in IBM SBE (Self-Boot Engine) firmware and other embedded PowerPC systems.

Changes:

  • Add PPE42 architecture implementation (src/arch/ppe42.rs)

    • Uses rlwimi instruction for magic breakpoints
    • Supports physical addressing (no MMU translation)
    • Makes CpuInstructionQueryInterface and CpuInstrumentationSubscribeInterface optional as they may not be available in all PPE42 Simics models
    • Uses r10 for index selector, r3-r5 for arguments (PowerPC ABI)
  • Add PPE42 harness header (harness/tsffs-gcc-ppe42.h)

    • Implements magic instructions using rlwimi format
    • Compatible with SBE firmware magic instruction conventions
    • Supports all standard harness operations (start, stop, assert)
  • Integrate PPE42 into architecture framework (src/arch/mod.rs)

    • Add PPE42 to Architecture enum and all trait implementations
    • Add architecture hint parsing for "ppe42", "ppc", "powerpc", "ppc32"
    • Refactor detection chain to use early returns for clarity
  • Update main harness header (harness/tsffs.h)

    • Add PPE42 architecture detection for GCC/Clang compilers
    • Include tsffs-gcc-ppe42.h for PowerPC preprocessor macros

This implementation provides the foundation for fuzzing embedded PowerPC firmware in Simics, with optional coverage tracking to be added separately.

@Manideep-Bhupalam Manideep-Bhupalam force-pushed the base_ppe branch 2 times, most recently from efddbc3 to 4c51a4c Compare May 13, 2026 07:47
@Manideep-Bhupalam
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@Wenzel @novafacing Can you please score this PR

feat: Add PPE42 (PowerPC Embedded) architecture support

Add support for the PPE42 (PowerPC Processor Embedded 42-bit) architecture
used in IBM SBE (Self-Boot Engine) firmware and other embedded PowerPC systems.

Changes:
- Add PPE42 architecture implementation (src/arch/ppe42.rs)
  * Uses rlwimi instruction for magic breakpoints
  * Supports physical addressing (no MMU translation)
  * Makes CpuInstructionQueryInterface and CpuInstrumentationSubscribeInterface
    optional as they may not be available in all PPE42 Simics models
  * Uses r10 for index selector, r3-r5 for arguments (PowerPC ABI)

- Add PPE42 harness header (harness/tsffs-gcc-ppe42.h)
  * Implements magic instructions using rlwimi format
  * Compatible with SBE firmware magic instruction conventions
  * Supports all standard harness operations (start, stop, assert)

- Integrate PPE42 into architecture framework (src/arch/mod.rs)
  * Add PPE42 to Architecture enum and all trait implementations
  * Add architecture hint parsing for "ppe42", "ppc", "powerpc", "ppc32"
  * Refactor detection chain to use early returns for clarity

- Update main harness header (harness/tsffs.h)
  * Add PPE42 architecture detection for GCC/Clang compilers
  * Include tsffs-gcc-ppe42.h for PowerPC preprocessor macros

This implementation provides the foundation for fuzzing embedded PowerPC
firmware in Simics, with optional coverage tracking to be added separately.
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