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Add support for AMD Zen 5, Intel Arrow Lake and Intel Lunar Lake microarchitectures#451

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fiban123 wants to merge 3 commits into
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Add support for AMD Zen 5, Intel Arrow Lake and Intel Lunar Lake microarchitectures#451
fiban123 wants to merge 3 commits into
google:mainfrom
fiban123:new-uarches

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@fiban123
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I've added support for AMD Zen 5, Intel Arrow Lake and Intel Lunar Lake microarchitectures.

Sources
because wikichip is down (probably indefinitely?), I've sourced the chip family and model values from the Linux kernel and LLVM github. I've included permalinks to the exact sources in the code.

The code compiles locally and all the ctests pass. I am unaware of how much the CMake ctests actually test, but all of them pass. I am not sure if further testing is needed.

This closes #449.

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@Mizux Mizux left a comment

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LGTM (checked URL and values)

Thx !
note: ref urls use linux torval kernel github mirror which is good since wiki-chip url seems dead...

@Mizux Mizux self-assigned this May 15, 2026
@Mizux Mizux added the enhancement New feature or request label May 15, 2026
@fiban123
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I'm confused. what does "some checks were not successful" mean?

  • The checks are failing on architectures i did not even edit (AArch, MIPS, ...)
  • The errors seem to be occuring in some QEMU compilation error.

Is this anything related to my PR?

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missing X86Microarchitecture enum entries for modern CPUs (Zen 5, arrowlake, moonlake)

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